1. Field of the Invention
The present invention relates to a photoelectric conversion device and a photoelectric conversion method, and more particularly to a photoelectric conversion device using a photoelectric conversion element of the amplification type capable of amplifying and outputting a photoelectrically converted signal with a transistor component, and a photoelectric conversion method thereof.
2. Related Background Art
Recently, photoelectric conversion elements of the amplification type capable of amplifying and outputting a photoelectrically converted signal have gained wide attention, because with the higher definition of photoelectric conversion elements, the output of photoelectrically converted signal may be reduced. Among such photoelectric conversion elements of the amplification type is a photoelectric conversion element having the same constitution as a unipolar or bipolar transistor, in which electric charge generated by light illumination is stored in the base or gate region which is a control electrode region, and an amplified signal is output from the source or emitter region which is a main electrode region.
FIG. 27 is a plan view showing a pixel using a conventional bipolar sensor. In this figure, 21 is an emitter region, 22 is an output line made of AL or the like, 23 is a contact hole connecting the emitter region 21 with the output line 22, 24 is a base region for storing photoelectric charges, 25 is a drive line made of poly-Si or the like for effecting the sensor action of pixel, 26 is a capacity C.sub.OX formed between the base region 24 and the drive line 25, and 27 is a gate electrode of p-type MOS transistor which is formed with the base regions 24 of adjacent pixels as source and drain regions, consisting of a part of the drive line 25, and 28 is a thick oxide film for the separation between pixels.
FIG. 28 is a cross-sectional view of FIG. 27, taken along the line X-X', and FIG. 29 is a cross-sectional view of FIG. 27, taken along the line Y-Y'. In FIGS. 28 and 29, 29 is a thin oxide film, 30 is an n.sup.30 layer of high impurity concentration provided for the separation between pixel signals in the Y-Y' direction, 31 is an n.sup.31 layer of low impurity concentration in which a depletion layer is spread, 32 is a collector region, and 33 is a layer insulation film for the separation between wirings 22, 25.
Note that as shown in FIG. 28, a p-type MOS transistor M for the reset (a region encircled by the broken line in the figure) is formed in a horizontal separation region of each pixel. If the gate of p-type MOS transistor M is turned on, the base region 24 of an adjacent pixel conducts, so that a reset is effected. On the contrary, if the gate is off, the p-type MOS transistor M serves as a pixel separation region.
Further, FIG. 30 is an equivalent circuit diagram of a two-dimensional photoelectric conversion device in which the pixels are arranged in two dimensions.
In FIG. 30, 41 is a pixel consisting of a bipolar sensor (or equivalently a bipolar transistor) T, a capacitor C.sub.OX connecting to the base, and a p-type MOS transistor M, 42 is a vertical output line connecting the emitters of pixels 41, 43 is a MOS transistor for resetting the vertical output line 42, 44 is a storage capacitor for storing an output signal from the pixel 41, 45 is a MOS transistor for transferring the output signal to the storage capacitor 44, 46 is a MOS transistor for receiving the output of a horizontal shift register and transferring an output signal to a horizontal output line 47, 48 is a MOS transistor for resetting the horizontal output line 47, 49 is a preamplifier, 50 is a horizontal drive line, 51 is a buffer MOS transistor for receiving the output of a vertical shift register and passing a sensor drive pulse therethrough, 52 is an emitter follower circuit for setting the source voltage of p-type MOS transistor to effect clamp operation of the pixel 41, 53 is a p-type MOS transistor for setting the base voltage of the emitter follower circuit 52, 54 is a terminal for applying pulses to the gate of MOS transistor 43, 55 is a terminal for applying pulses to the gate of transfer MOS transistor 45, 56 is a terminal for applying sensor drive pulses, 57 is a terminal for applying pulses to the gate of p-type MOS transistor 53, and 58 is an output terminal connecting to the preamplifier 49.
A two-dimensional solid-state image pickup device as shown in FIG. 30 is of the type in which all the pixels are reset at a time, and is useful for the still video and so on.
The operation thereof will be described below.
First, the p-type MOS transistor 53 is turned on and the output of emitter follower circuit 52 is made at a positive voltage, by applying a low-level pulse to the terminal 57 of FIG. 30. The output of this emitter follower circuit 52 is connected to the sources of p-type MOS transistors M for the pixels 41, wherein if the source voltage is higher enough than the gate voltage to fully turn on the p-type MOS transistor M, holes are injected into the base of bipolar sensor T for the pixel through the p-type MOS transistor M.
Then, a high-level pulse is applied to the terminal 57, so that the p-type MOS transistor 53 is turned off, and the output of the emitter follower circuit 52 is grounded.
Then, a high-level pulse is applied to the terminal 54 of FIG. 30, so that the transistor 43 is turned on, and the vertical output line 42 is grounded (referred to as a first reset).
Then, the vertical shift register is driven while in this state, and a reset pulse of pixel is applied to the terminal 56, so that pixels are reset sequentially from one row to another, and the bases of bipolar sensors T for all the pixels are placed at a constant voltage and reverse-biased (referred to as a second reset).
After the storage operation of light carriers is carried out, a low-level pulse is applied to the terminal 54 of FIG. 30, so that the MOS transistor 43 is turned off. For each row selected by the output of vertical shift register, a read pulse is applied from the terminal 56, whereby a signal output is stored through the MOS transistor 45 in the storage capacitor 44. The signal output stored in the storage capacitor 44 is transferred through the transfer MOS transistor 46 selected by the horizontal shift register to the horizontal output line 47, and output through the preamplifier 49 to the output terminal 58.
First of all, a first problem with the conventional photoelectric conversion element will be described below.
The photoelectric conversion element has been utilized in practice as the sensor element for camera or FAX by virtue of its superior photoelectric conversion characteristics. However, with minuter confirguration of sensor elements,
(1) Reduced number of light generated carriers with decreased light receiving area, and PA1 (2) Lower capacity division ratio with increased parasitic capacity component take place, and as a result, the signal component decreases, and the S/N ratio is lowered. PA1 Ae: Opening area PA1 ts: Storage time PA1 C.sub.OX : Overlap capacity between MIS gate electrode and control electrode PA1 C.sub.bc : Base-collector junction capacity PA1 h.sub.FE : Current amplification factor of Tr PA1 C.sub.T : Temporary charge stored capacity PA1 C.sub.vl : Parasitic capacity on the vertical line PA1 a first transistor having a control electrode region consisting of a semiconductor of one conduction type, and first and second main electrode regions consisting of a semiconductor of an opposite conduction type of the one conduction type, for outputting a signal from the first main electrode region based on carriers transferred to the control electrode region, PA1 a carrier storage region provided adjacent the first transistor, consisting of a semiconductor of the one conduction type for storing carriers generated by light energy being received, and PA1 a second transistor, with the carrier storage region and the control electrode region of said transistor as the source and drain regions, for transferring carriers stored in the carrier storage region to the control electrode region of the transistor. PA1 a first transistor having a control electrode region consisting of a semiconductor of one conduction type, and first and second main electrode regions consisting of a semiconductor of an opposite conduction type of the one conduction type, for outputting a signal from said first main electrode region based on carriers transferred to said control electrode region, PA1 a carrier storage region provided adjacent the first transistor, consisting of a semiconductor of the one conduction type for storing carriers generated by light energy being received, and PA1 an insulated gate transistor as a second transistor, with the carrier storage region and the control electrode region of the transistor as the source and drain regions, for transferring carriers stored in the carrier storage region to the control electrode region of the transistor, characterized by including PA1 a first reset operation for setting the carrier storage region and the control electrode region to their initial voltages by allowing the second transistor to conduct, PA1 a storage operation for storing carriers generated by light illumination in said carrier storage region, PA1 an operation for transferring carriers stored in one of said carrier storage regions to the control electrode region, by allowing one of said second transistors to conduct, PA1 a reading operation for reading the voltage of the control electrode region uniquely determined by transferred carriers, and PA1 a second reset operation for initializing the voltage of said control electrode region after reading. PA1 a plurality of photoelectric conversion cells having light signal storing means for storing carriers generated by light energy being received, light signal holding means for holding carriers transferred from said light signal storing means, a first switch means for controlling the conduction between said light signal storing means and the light signal holding means, and a second switch means for connecting the light signal storing means with a predetermined voltage source, PA1 first control means for operating the first switch means collectively for all the photoelectric conversion cells, and PA1 second control means for operating the second switch means collectively for all the photoelectric conversion cells, PA1 characterized in that said first control means transfers carriers from the light signal storing means to the light signal holding means, and the second control means resets the light signal storing means at a predetermined voltage. PA1 1) First reset operation to set a plurality of carrier storage regions and control electrode regions to their initial voltages, PA1 2) Subsequent storage operation to store carriers generated by light illumination in carrier storage regions, PA1 3) Subsequent transfer operation to transfer carriers stored in one of the carrier storage regions to a control electrode region by allowing one of a plurality of insulated gate transistors to conduct, PA1 4) Subsequent reading operation to read the voltage of control electrode region uniquely determined by transferred carriers, PA1 5) Second reset operation after reading to initialize the voltage of said control electrode region, PA1 6) Repeating each operation of transfer, reading and reset, according to the operations of 3) to 5), for other carrier storage regions.
Accordingly, to proceed with more minute structure, it is necessary that the signal component be maintained as large as possible. There is the following relation between the sensitivity of photoelectric conversion element and the parasitic capacity:
Expression 1 ##EQU1## S: Sensitivity Ip: Photocurrent generating density
As will be clear from the expression (1), to obtain the greatest sensitivity, it is desirable to make C.sub.bc +C.sub.ox as small as possible in the former term and to make C.sub.vl +C.sub.T as small as possible and C.sub.bc +C.sub.OX as large as possible in the latter term, providing that the opening .area, the photocurrent generating density, the storage time and H.sub.FE are fixed. When the pixel size is relatively large, the degree of freedom for the layout is high and each capacity value can be easily controlled, whereby the sensitivity could be rendered sufficiently high. However, if the pixel size becomes smaller with further progress of more minute construction, the degree of freedom for the layout decreases due to process constraint such as alignment precision or increased junction capacity component, and reduced opening ratio. On the device operation, the value of C.sub.T has a lower limit, due to constraint in finally reading the value, and the value of C.sub.OX has a lower limit from the point of determining the saturation voltage, and an upper limit from the point of maintaining the opening ratio. Also, the value of C.sub.bc has an inconsistent requirement that it should be smaller to make the base voltage in reading as high as possible, and be greater to provide the least voltage drop due to capacity division with the reading operation. Accordingly, to provide the greatest sensitivity, it is desirable that the values of C.sub.OX, C.sub.T are determined from the operational requirements, C.sub.bc is set at an optimal value, and C.sub.vl is set at minimum, whereas in the conventional structure, C.sub.be, a main factor for determining C.sub.vl, which is determined by the emitter size, can hereby be decreased, so that there was a tendency that the sensitivity would decrease with smaller pixel size.
Next, a second problem of the conventional photoelectric conversion element will be described below.
For the two-dimensional photoelectric conversion device as shown in FIG. 30, the first reset is performed at the same time, as already described, but the subsequent second reset operation that the base of bipolar sensor T for the pixel is placed at a fixed voltage and reverse-biased, is effected sequentially for each pixel from one row to another, so that the start of storage operation takes place at different times for the pixels in each row. Also, the storage operation is terminated immediately before the start of reading operation, but the reading operation is made sequentially for each pixel from one row to another, so that the termination of storage operation takes place at different times for the pixels in each row.
Accordingly, a certain drift may arise at the start and termination time of storage operation from one row to another, when a fast motion picture is picked up, so that the output image may be distorted. In particular, when the motion picture is read as a still image, this tendency is more noticeable.